1. Field of the Invention
The present invention relates to an electromagnetic pulse protection circuit capable of suppressing fast and slow over-voltage surges caused by electromagnetic pulse and, more particularly, to an electromagnetic pulse protection circuit with a counter.
2. Description of Related Art
Because of high voltage, large current and very fast rise speed of electromagnetic pulse (EMP), a lightning arrester is generally provided before an existent communication electronic device. The lightning arrester is a slow lightning EMP (LEMP) protector, and is usually composed of spark gap switches or zinc oxide elements. The LEMP protector has a slower response time, and usually starts suppressing just after the surge voltage is very high. Therefore, the LEMP protector has no protection capability for fast-rise pulses.
A fast electrostatic discharge (ESD) protector (e.g., TVS, DIAC, or MOV) is generally provided after an IC. Although a fast response protector has a very fast response and can endure a voltage as high as 8000 V, but cannot resist a large current. Especially, lightning or a man-made EMP bomb produces a wider pulse. An over voltage for a long time will generate the current effect and also produces much heat to first burn out the ESD (fast response protector) and then the internal structure of the semiconductor device. Therefore, a fast response protector can only endure electrostatic discharge but cannot resist the attack of various EMPs with large energy.
A lightning arrester (LEMP protector) is generally provided before an existent communication electronic device, and a fast electrostatic discharge protection device (ESD protector) is generally provided after an IC. Nevertheless, the above problems cannot be solved by directly shunting the LEMP protector and the fast response protector. This is because the current will first flow to the fast response protector having a small current resistance until the fast response protector burns out, and the voltage rises again to burn out the IC equipment after the LEMP protector before the LEMP is activated. Besides, because all fast response protectors are capacitive reactance elements, they will cause insertion loss of input signals of communication equipments to affect the communication distance.
The applicant has disclosed a solution in Taiwan Pat. No. 588,888. As shown in FIG. 1, an EMP protection circuit is formed by connecting a resistive element 42 between a fast response protector 43 and an LEMP protector 41 and also series connecting an insertion loss compensating element 44 below the fast response protector 43. Because the fast response protector is capacitive, bad discharge of fast surge will happen at middle frequencies, and a band-stop effect will be generated at higher frequencies, hence being detrimental to wide band frequency-hopping applications. Therefore, the applicant has subsequently disclosed a novel EMP protection circuit, in which the insertion loss of the fast response protector 43 is further compensated or the architecture of the fast response protector 43 is changed, as shown in FIG. 2. Moreover, a voltage variable capacitive reactance element 46 can be series connected on the signal path between a surge protection circuit 45 and a protected circuit 47, as shown in FIG. 3, to effectively remove damage to electronic elements caused by EMP.
To accomplish perfect EMP protection, how to ensure that the EMP protection circuit can effectively operate is very important. In practice, however, it is easy to forget checking whether the EMP protection circuit has exceeded its time-limit of use. All the above prior arts lack human-based design and thus may cause hazards as a result of overdue use.